低功耗SAR ADC的高性能比较器综述

目前逐次逼近型模数转换器(SAR ADC)已经成为低功耗数模混合集成电路中模数转换器的首选架构,其中的核心模块—高性能比较器的功耗大小直接决定了SAR ADC的整体功耗。文章从低功耗SAR ADC系统出发,聚焦高性能低功耗电压域和时间域比较器的发展历程与最新研究进展,总结了通过优化SAR逻辑实现低功耗比较器的技术方法。该综述为数模混合电路设计者了解并掌握SAR ADC中高性能低功耗比较器技术提供有力参考。

An Overview of High Performance Comparators for Low Power SAR ADC

The successive approximation analog-to-digital converter (SAR ADC) has become the preferred architecture of ADC in low power digital-analog hybrid integrated circuit. As the core module, the power of high performance comparator directly determines the overall power dissipation of SAR ADC. Starting from the low power SAR ADC system, this work focused on the development histories and latest research progresses of high performance low power voltage and time domain comparators, and summarized the techniques of realizing low power comparator by optimizing SAR logic. This work could help mixed-signal circuit designers understand the new techniques of low power comparator in SAR ADC.