Analog VLSI Stochastic Perturbative Learning Architectures |
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Authors: | Gert Cauwenberghs |
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Affiliation: | (1) Electrical and Computer Engineering, Johns Hopkins University, Baltimore, MD, 21218 |
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Abstract: | We present analog VLSI neuromorphic architectures fora general class of learning tasks, which include supervised learning,reinforcement learning, and temporal difference learning. Thepresented architectures are parallel, cellular, sparse in globalinterconnects, distributed in representation, and robust to noiseand mismatches in the implementation. They use a parallel stochasticperturbation technique to estimate the effect of weight changeson network outputs, rather than calculating derivatives basedon a model of the network. This model-free technique avoidserrors due to mismatches in the physical implementation of thenetwork, and more generally allows to train networks of whichthe exact characteristics and structure are not known. With additionalmechanisms of reinforcement learning, networks of fairly generalstructure are trained effectively from an arbitrarily suppliedreward signal. No prior assumptions are required on the structureof the network nor on the specifics of the desired network response. |
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Keywords: | Neural networks neuromorphic engineering reinforcement learning stochastic approximation |
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