Power-efficient gate control of synchronous boost converters with high output voltage |
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| Authors: | Woo Y-J Cho G-H |
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| Affiliation: | Div. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon; |
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| Abstract: | A half output voltage swing gate driving scheme is presented for high voltage single chip DC/DC converters. In the proposed scheme the energy for the PMOS gate drive is reused for the NMOS gate drive, and switching loss is reduced. A high speed and area-efficient high voltage level shifter is also realised. A prototype is implemented using a 0.5 mum 40 V power BiCMOS process |
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