| 芯片功耗限制对器件按比例缩小的影响 |
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| 引用本文： | 陈文松.芯片功耗限制对器件按比例缩小的影响[J].微电子学,1998,28(3):199-202. |
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| 作者姓名： | 陈文松 |
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| 作者单位： | 清华大学微电子学研究所 |
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| 摘 要： | 随着器件特征尺寸的不断缩小，电路功耗限制将对器件的进一步按比例缩小产生显著影响。文章在一些假设的前提下提出一简单物理模型对这一影响进行建模，并据此模型对开启电压变化时的影响作了分析。文中还对功耗管理和低温工作的作用进行了探讨。
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| 关 键 词： | 集成电路 器件按比例缩小 MOS |
The Impact of Power Dissipation Constraints on Device ScalingCHEN Wen Song |
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| Institute of Microelectronics,Tsinghua University,Beijing.The Impact of Power Dissipation Constraints on Device ScalingCHEN Wen Song[J].Microelectronics,1998,28(3):199-202. |
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| Authors: | Institute of Microelectronics Tsinghua University Beijing |
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| Affiliation: | Institute of Microelectronics,Tsinghua University,Beijing 100084 |
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| Abstract: | A simple physical model is presented,on some reasonable assumptions,to simulate the effects of the power dissipation constraints on device scaling.Simulation results are used to analyze the impact of different voltage threshold scenarios on device scaling limitations.The effectiveness of power management technology and low temperature operation is also demonstrated using this model. |
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| Keywords: | Integrated circuit Device scaling Power management Low temperature operation |
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