Design and Analysis of Built-In Testers for CMOS Switched-Current Circuits |
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Authors: | Cheng-Ping Wang Chin-Long Wey |
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Affiliation: | (1) Mixed Signal Products, Semiconductor Group, Texas Instruments Incorporated, Dallas, TX, 75243;(2) Department of Electrical Engineering, Michigan State University, East Lansing, MI, 48824-1226 |
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Abstract: | This paper presents the design and analysis of a built-in tester circuit for MOS switched-current circuits used in low-voltage/low-power mixed-signal circuits/systems. The use of the tester can reduce the test length significantly. The developed tester is comprised of a current comparator, a voltage window comparator, and a digital latch. The current comparator is required to have high-accuracy, low-power consumption, simple structure with small chip area, and moderate speed. Results show that the developed current comparator circuit is developed with a small offset current, 0.1 nA, low power consumption, 20 W, and a layout area of 0.01 mm2, where the circuit is simulated with the MOSIS SCN 2 m CMOS process parameters and 2 V supply voltage. |
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Keywords: | built-in testers switched-current technique mixed-signal circuits current comparator voltage window comparator cyclic A/D converters |
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