Une architecture massivement parallèle intégrée |
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| Authors: | Bernard Faure S Mahmoud Karabernou Guy Mazaré Eric Payan Pascal Rubini |
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| Affiliation: | 1. IMAG/LGI Groupe circuits intégrés, 46, avenue Félix Viallet, F-38031, Grenoble cedex
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| Abstract: | This paper presents a new massively parallel MIMD architecture, halfway between the Connection Machine and hypercubes based on 32-bit processors. It is built from specific 8-bit processors arranged in a 2-D grid and communicating by message transfers. We discuss the communication problems, the instruction set of the basic processing unit, the programmation of the whole array and the use of a high level data-flow language. |
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