基于最大时域瞬态噪声的去耦电容选择方法

针对传统的基于频域目标阻抗的去耦电容选择方法存在过度设计的问题，该文提出基于最大时域瞬态噪声的去耦电容选择方法。首先，利用板级电流可由一系列三角脉冲近似合成这一性质，推导出了去耦电容瞬态电压噪声达到局部最大值的时刻及时域瞬态阻抗应该满足的条件，并通过分析VRM支路最大瞬态电压噪声确定了去耦电容的去耦时间范围；其次，通过研究去耦电容时域瞬态阻抗曲线的性质和特点，制定了去耦电容的选择标准。最后，提出基于最大时域瞬态噪声的去耦设计方案。通过对4个具有典型激励输入的实例进行去耦设计，结果表明，在输入激励条件相同且满足电压噪声要求的前提下，与传统频域目标阻抗法获得的去耦方案相比，该文提出的算法所需电容数量至少能减少24.59%以上。

Decoupling Capacitor Selection Method Based on Maximum Time-domain Transient Noise

A decoupling capacitor selection method based on maximum time-domain transient noise is proposed to solve the over-design problem caused by the traditional method based on the frequency-domain target impedance. According to the property that the current in board level can be approximated by a series of triangular pulses, the time to reach the decoupling capacitor's local maximum transient voltage noise and the condition which should be satisfied for the time-domain transient impedance are derived. Meanwhile, the time range of decoupling is determined by analyzing the maximum transient voltage noise of VRM branch. In addition, the selection criteria for the decoupling capacitors are developed by researching the properties and characteristics of the time-domain transient impedance curves of the decoupling capacitors. Finally, the decoupling design scheme based on the maximum time-domain transient noise is proposed. Comparing with the traditional frequency-domain decoupling scheme, the results of decoupling design for four examples with typical stimulus settings show that the quantity of capacitors can be reduced by more than 24.59% by the proposed algorithm under the condition of the same input excitation and satisfying the requirement of voltage noise.