| 一种高性能低功耗的运动估计的设计 |
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| 引用本文： | 郑吉君. 一种高性能低功耗的运动估计的设计[J]. 信息技术, 2011, 0(5): 84-86,90 |
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| 作者姓名： | 郑吉君 |
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| 作者单位： | 上海交通大学微电子学院,上海,200240 |
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| 摘 要： | 基于运动估计的全搜索算法,人们提出了有预处理的脉动阵列硬件结构,相较于无功耗处理的原始脉动阵列减少了12.3%。在此基础上,进一步根据逻辑产生门控时钟以及停止寄存器链对电路进行管理,取得了69.2%的功耗节省。
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| 关 键 词： | 全搜索算法 脉动阵列 预处理 门控时钟 |
Design of a high-performance and low-power motion estimation |
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| ZHENG Ji-jun. Design of a high-performance and low-power motion estimation[J]. Information Technology, 2011, 0(5): 84-86,90 |
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| Authors: | ZHENG Ji-jun |
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| Affiliation: | ZHENG Ji-jun (School of Microelectronics,Shanghai Jiaotong University,Shanghai 200240,China) |
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| Abstract: | A pretreatment systolic array hardware architecture is proposed based on full-search algorithm of motion estimation.This architecture reduces 12.3% compared with non-power processing primitive systolic array.Based on this,futher manages circuit according to the logic producing gating clock as well as stopping register chain,and achieves 69.2% power savings. |
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| Keywords: | full-search algorithm systolic array architecture pre-processing gating clock |
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