Time-variant analysis and design of a power efficient ISM-band quadrature receiver

In this work a 2.2 GHz quadrature receiver front-end suitable for low-power applications is presented. The low-noise amplifier, the mixer and the voltage-controlled oscillator are merged into a single stage, making the circuit capable of extreme current reuse while keeping it still functional at low supply voltage. A careful linear time-variant analysis is proven to be necessary to accurately predict the conversion gain and the bandwidth of the downconverter. A prototype, implemented in a 90 nm CMOS technology, validates the theoretical analysis, showing 27 dB of downconversion gain over a 14 MHz base-band bandwidth; the noise figure is 13 dB with a flicker corner frequency of 200 kHz; the input-referred 1 dB compression point is −23.7 dBm. The circuit draws only 1.3 mA from a 1.0 V supply.