Reliability assessment of SiO2/ZrO2 stack gate dielectric on strained-Si/Si0.8Ge0.2 heterolayers under dynamic and AC stress |
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Authors: | MK Bera C Mahata CK Maiti |
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Affiliation: | aDepartment of Electronics and ECE, Indian Institute of Technology, Kharagpur 721302, India |
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Abstract: | The reliability characteristics of SiO2/ZrO2 gate dielectric stacks on strained-Si/Si0.8Ge0.2 have been investigated under dynamic and pulsed voltage stresses of different amplitude and frequency in order to analyze the transient response and the degradation of oxide as a function of stress parameters. The current transients observed in dynamic voltage stresses have been interpreted in terms of the charging/discharging of interface and bulk traps. The evolution of the current during unipolar pulsed voltage stresses shows the degradation being much faster at low frequencies than at high frequencies. Results have been compared with those obtained after CVS, as a function of injected charge and pulse frequency. |
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Keywords: | High-k gate dielectric Strained-Si Dynamic stress Oxide reliability |
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