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Analysis of a novel (LCR)trap-LC-RC filter with improved performance for standalone inverters
Authors:Meenakshi Jayaraman
Affiliation:School of Electrical Engineering, VIT University, Chennai, IndiaORCID Iconhttps://orcid.org/0000-0003-0668-0863
Abstract:ABSTRACT

This work introduces a new passive filter structure for a pulse width modulated inverter used in standalone applications. The proposed structure consists of an additional capacitor connected across the resistance-capacitance branch of the traditional LCR filter and an additional resistor connected across the trap filter capacitor in the traditional (LC)trap-LCR filter configuration which helps to reduce damping power loss and increase harmonic attenuation while maintaining the same overall filter size of conventional filters. A comprehensive parameter design procedure of the proposed filter is introduced which considers inverter switching frequency and choice of damping components. Further, particle swarm optimisation algorithm is newly employed in this work to minimise resonant peaking on the premise of allowable values of overall filter inductance, capacitance and resistance. Simulation and experimental results are presented to analyse the performance of the proposed filter and a comparison is established with other passive filter topologies. A five-level inverter with the proposed filter is implemented using a SPARTAN- 6 XC6SLX25 processor on an experimental set-up. The experimental results show an attractive performance of the proposed filter in providing improved inverter output waveforms, significant harmonic reduction in the high-frequency band, reduced resonant peaking, lesser harmonic distortion and lower damping power loss.
Keywords:Cascaded H-Bridge (CHB)  pulse width modulation (PWM)  harmonics  total harmonic distortion (THD)  field programmable gate array (FPGA)
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