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FPGA在共模噪声能量评估中的应用
引用本文:高俊领,张凯,章勇高,方华松. FPGA在共模噪声能量评估中的应用[J]. 通信电源技术, 2006, 23(6): 1-3
作者姓名:高俊领  张凯  章勇高  方华松
作者单位:华中科技大学,湖北,武汉,430074
基金项目:国家自然科学基金资助项目(50407011),台达电力电子科教发展资金资助。
摘    要:在电力电子开关变换器数字化共模噪声抑制系统中,一个重要环节就是共模噪声的评估。由于共模噪声电流振荡频率很高,基于DSP的采样控制很难满足要求。文章提出了用FPGA作为主要器件、以能量为指标的共模噪声评估技术。所提方案中,FPGA可完成对高速AD芯片的采样控制、读取采样值、计算共模电流的噪声能量值并将该值反馈给DSP。DSP也可以通过向FPGA写入控制字和发启动脉冲等方式对噪声电流的采样过程进行宏观层面的控制。

关 键 词:FPGA  共模电流  噪声能量
文章编号:1009-3664(2006)06-0001-03
收稿时间:2006-07-07
修稿时间:2006-07-07

FPGA in Estimation on Common-Mode Noise Energy
GAO Jun-ling,ZHANG Kai,ZHANG Yong-gao,FANG Hua-song. FPGA in Estimation on Common-Mode Noise Energy[J]. Telecom Power Technologies, 2006, 23(6): 1-3
Authors:GAO Jun-ling  ZHANG Kai  ZHANG Yong-gao  FANG Hua-song
Affiliation:Huazhong University of Science and Technology, Wuhan 430074, China
Abstract:In the system of digitalized attenuation common-mode noise of switching mode converters,one of the keys is how to estimate the common-mode noise.Due to the high oscillation frequency of the common-mode noise current,It is very difficult to meet the estimation demand based on the DSP device sampling.This article proposed the technology of appraising common-mode noise with taking the energy as the datum and FPGA as the main component.In the plan mentioned,FPGA may complete to the high-speed AD chip sampling control,read the sampling value,and compute commom-mode current noise energy value and gives the value to DSP.DSP also may control the noise current sampling process macroscopically by writing the control word to FPGA and sending starting pulse to FPGA.
Keywords:FPGA  common-mode noise  sampling control  
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