| 串行背板收发器VSC870接口逻辑的设计与实现 |
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| 引用本文： | 陈曦,刘尉悦,王砚方. 串行背板收发器VSC870接口逻辑的设计与实现[J]. 数据采集与处理, 2002, 17(2): 187-191 |
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| 作者姓名： | 陈曦 刘尉悦 王砚方 |
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| 作者单位： | 中国科学技术大学近代物理系,合肥,230027 |
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| 摘 要： | 论述了路由器研发项目中网络处理器IXP1200与串行背板收器VSC870之间的数据转换逻辑的设计，详细介绍了VSC870接口逻辑的设计与具体实现，包括系统的构成、接口逻辑的基本功能、串行背板收发器工作模式的选择以及虚拟输出队列、提前促裁方式等关键问题的设计思想与实现方法以及采用FPGA的实现过程。经过系统测试，验证了数据转换逻辑的正确性，对完成网络处理器与串行背板收发器之间数据转换逻辑的设计及高速路由器项目的研发具有典型意义。
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| 关 键 词： | 虚拟输出队列 路由器 互联网 串行背板收发器 VSC870 接口逻辑 设计 |
| 文章编号： | 1004-9037(2002)02-0187-05 |
| 修稿时间： | 2001-06-28 |
Logical Design of Serial Backplane Transceiver VSC870 Interface |
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| Chen Xi Liu Weiyue Wang Yanfang. Logical Design of Serial Backplane Transceiver VSC870 Interface[J]. Journal of Data Acquisition & Processing, 2002, 17(2): 187-191 |
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| Authors: | Chen Xi Liu Weiyue Wang Yanfang |
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| Abstract: | The logical design and realization of VSC870 interface are studied and the design is used in data conversion between network processor and serial backplane transceiver. The structure of system and the basic function of interface logic are described, some key technologies of high speed router such as VOQ and early arbitration are introduced. Experimental results in the actual system are obtained. Results show that the method of data conversion by the logic and the realization in a single FPGA is feasible and reliable. |
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| Keywords: | serial backplane transceiver FIFO vitrual output queue early arbitration |
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