| 基于数字ASIC设计流程的DDS设计与实现 |
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| 引用本文： | 陈冀明,李开航. 基于数字ASIC设计流程的DDS设计与实现[J]. 现代电子技术, 2010, 33(6): 12-15 |
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| 作者姓名： | 陈冀明 李开航 |
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| 作者单位： | 厦门大学,福建,厦门,361005 |
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| 摘 要： | 作为第三代频率合成技术，直接数字频率合成器具有显著的优点并得到广泛的应用。在此结合数字ASIC设计流程，利用流水线技术和函数对称性性质，设计并实现一个优化的DDS电路。从系统结构划分到自动布局布线，逐步介绍各个设计阶段的目的、使用软件及设计要点。经过分析，最终得到的DDS电路能够运行在150MHz系统时钟下，并且具有较小的面积，满足设计要求。
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| 关 键 词： | DDS ASIC Verilog 流水线 |
Design and Implementation of DDS Based on Digital ASIC Design Flow |
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| CHEN Jiming,LI Kaihang. Design and Implementation of DDS Based on Digital ASIC Design Flow[J]. Modern Electronic Technique, 2010, 33(6): 12-15 |
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| Authors: | CHEN Jiming LI Kaihang |
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| Affiliation: | CHEN Jiming,LI Kaihang(Xiamen University,Xiamen,361005,China) |
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| Abstract: | As the third generation frequency synthesizer,Direct Digital Synthesizer(DDS) has been widely used due to its many significant advantages.An optimized DDS based on digital ASIC design flow is designed and implemented by using the pipeline technology and the symmetry character of a few functions.The design steps from the structure divide to the auto placement and route are given out in detail,and each involves in the design purpose,software in use and design points.Theoretical results show that the proposed ... |
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| Keywords: | DDS ASIC Verilog |
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