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Advantage of further scaling in gate dielectrics below 0.5 nm of equivalent oxide thickness with La2O3 gate dielectrics
Authors:K. Kakushima  K. Tachi  K. Tsutsui  T. Hattori
Affiliation:a Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, 4259 Nagatsuta, Midori-ku, Yokohama 226-8502, Japan
b Frontier Research Center, Tokyo Institute of Technology, 4259 Nagatsuta, Midori-ku, Yokohama 226-8502, Japan
Abstract:N-type metal-oxide-semiconductor field-effect transistor (MOSFET) with an equivalent oxide thickness (EOT) of 0.37 nm has been demonstrated with La2O3 as a gate dielectric for the first time. Despite the existence of parasitic capacitances at gate electrode and inversion layer in the channel, a sufficient drain current increment in both linear and saturation regions have been observed, while scaling the gate oxide from 0.48 to 0.37 nm in EOT. Therefore, continuous scaling of EOT below 0.5 nm is still effective for further improvement in device performance.
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