Advanced analysis on board trace reliability of WLCSP under drop impact |
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Authors: | Ahmer Syed Hun Shen Ng Rex Anderson Choong Peng Khoo Boyd Rogers |
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Affiliation: | Amkor Technology, Inc., No. 2, Science Park Drive, Singapore 118222, Singapore |
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Abstract: | Through an aggressive product development program which includes experiment and simulation, Amkor has developed the next level of WLCSP (CSPnl™), a product which exhibits superior board level reliability when subjected to drop impact, a strong requirement for portable electronics. Failure mechanism of WLCSP under drop test has been established. Depending on type of WLCSP and test board design, three primary failure modes can be observed, i.e. copper (Cu) board trace crack, Cu RDL (redistribution layer) vertical crack and Cu/Under Bump Metallization (UBM) delamination. CSPnl can exhibit distinct failure modes under different test board and/or CSPnl designs, resulting in a vast difference in drop test lifetimes. The primary failure mode is shifted whenever the weakest link is removed through design improvement. This paper will focus on detailed analysis of copper board trace crack under drop test, using an integrated approach of testing, failure analysis, material characterization and modeling. Board design guidelines are formulated to understand the effects of I/O position, board trace routing direction, board trace width, tear drop design, PCB pad size, stack-up thickness, and alloy materials on board trace reliability. Comparison is also made on possible impact on Cu RDL reliability. |
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Keywords: | WLCSP Drop Test Solder Joint Reliability Design Modeling Copper Interconnect |
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