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New ECL gate in BiFET process |
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| Authors: | Oklobzija VG |
| Affiliation: | Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA; |
| Abstract: | An ECL gate is implemented as a combination of bipolar and MOS circuits in a BiFET process is presented. The resulting ECL gate exhibits an improved speed-power product over circuits presented in the past. Owing to its reduced power consumption this gate allows a higher level of integration for ECL. The process used is standard BiCMOS.< |
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