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Interfacial Reaction Effect on Electrical Reliability of Cu Pillar/Sn Bumps
Authors:Myeong-Hyeok Jeong  Gi-Tae Lim  Byoung-Joon Kim  Ki-Wook Lee  Jae-Dong Kim  Young-Chang Joo  Young-Bae Park
Affiliation:(1) Department of Chemical Engineering and Materials Science, Michigan State University, East Lansing, MI 48824, USA;
Abstract:Thermal annealing and electromigration (EM) tests were performed with Cu pillar/Sn bumps to understand the growth mechanism of intermetallic compounds (IMCs). Annealing tests were carried out at both 100°C and 150°C. At 150°C, EM tests were performed using a current density of 3.5 × 104 A/cm2. The electrical failure mechanism of the Cu pillar/Sn bumps was also investigated. Cu3Sn formed and grew at the Cu pillar/Cu6Sn5 interface with increasing annealing and current-stressing times. The growth mechanism of the total (Cu6Sn5 + Cu3Sn) IMC changed when the Sn phase in the Cu pillar/Sn bump was exhausted. The time required for complete consumption of the Sn phase was shorter during the EM test than in the annealing test. Both IMC growth and phase transition from Cu6Sn5 to Cu3Sn had little impact on the electrical resistance of the whole interconnect system during current stressing. Electrical open failure in the Al interconnect near the chip-side Cu pillar edge implies that the Cu pillar/Sn bump has excellent electrical reliability compared with the conventional solder bump.
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