Quasi-adiabatic ternary CMOS logic |
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Authors: | Mateo D. Rubio A. |
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Affiliation: | Dept. of Electron. Eng., Univ. Politecnica de Catalunya, Barcelona; |
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Abstract: | Adiabatic switching is one technique for designing low power ICs. To diminish its expensive silicon area requirements a quasi-adiabatic ternary logic is proposed. The performances of a half adder using this logic have been obtained, showing a 65% area saving with respect to adiabatic binary logic |
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