| 一种无线局域网专用高性能FFT处理器设计 |
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| 引用本文： | 王江, 黑勇, 郑晓燕, 仇玉林,.一种无线局域网专用高性能FFT处理器设计[J].电子器件,2007,30(2):475-480. |
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| 作者姓名： | 王江 黑勇 郑晓燕 仇玉林 |
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| 作者单位： | 中国科学院微电子研究所,北京,100029 |
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| 摘 要： | 针对基8算法提出一种无冲突地址生成方法,设计了802.11a专用FFT处理器,整体采用流水处理,实现了一种高性能FFT硬件架构,各级RAM采用乒乓操作,每个RAM均由8个独立的SRAM存储体组成,通过对循环移位寄存器译码,蝶算单元并行无冲突读写RAM操作数,8通道输入数据并行处理,每级运算所需的时钟周期大幅度降低.FFT运算连续输入、输出,数据运算精度通过块浮点得到保证.整体具有高速、高精度的特征.本文提出的无冲突地址生成方法也可以扩展至高点数FFT的应用.
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| 关 键 词： | 无线局域网 快速傅立叶变换 无冲突地址生成 并行计算 流水线 |
| 文章编号： | 1005-9490(2007)02-0475-06 |
| 修稿时间： | 2006年3月10日 |
Design of a High Performance FFT Processor for WLAN Application |
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| WANG Jiang,HEI Yong,ZHENG Xiao-yan,QIU Yu-lin.Design of a High Performance FFT Processor for WLAN Application[J].Journal of Electron Devices,2007,30(2):475-480. |
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| Authors: | WANG Jiang HEI Yong ZHENG Xiao-yan QIU Yu-lin |
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| Affiliation: | Institute of Microelectronics of Chinese Academy of Sciences,Beijing 100029,China |
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| Abstract: | An efficient implementation of conflict free address generation for radix-8 FFT processor is presented.Every RAM is interleaved with 8 SRAMs.The circulation registers are introduced and the decoding result in the conflict free address generation.Parallel processing is acquired when the butterfly elements get 8 data in a cycle.By means of pipeline architecture and ping-pong RAM access,the result could be got continuously.By introducing the block floating point module,high accuracy is acquired without much hardware penalty. |
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| Keywords: | WLAN FFT conflict free address generation parallel processing pipeline |
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