一种基于偏移源的频率合成技术分析

针对一种基于偏移源的频率合成技术,建立了锁相环(PLL)线性模型,对相位噪声和杂散信号性能进行分析。从分析结果看,在锁相环反馈支路中使用一个偏移源将压控振荡器(VCO)输出信号下混频至一个较低的中频,从而将锁相环的环路分频比大大降低,使改善后的锁相环噪底达到-135 dBc/Hz。介绍了偏移源和主环的关键合成技术,结合工程应用设计的基于偏移源的C频段频率合成器,相位噪声偏离载波10 kHz处≤-99 dBc/Hz,偏离载波100 kHz处≤-116 dBc/Hz,杂散小于-70 dBc。

A Frequency Synthesis Technique Based on Offset Source

This paper presents a frequency synthesis technique based on offset source.The synthesizer utilizes a fundamental offset source in an offset phase locked loop（PLL） to translate an output of VCO to a lower IF signal by mixer,for locking to a reference signal.Thus,the PLL residual noise floor of about-135 dBc/Hz is achieved by removing frequency division from the phase-locked loop.The measured phase noise at C band output and 10 kHz offset is-99 dBc/Hz,and-116 dBc/Hz at 100 kHz offset.The spurious signal is lower than-70 dBc.