| 甚高频信号源的设计 |
| |
| 引用本文： | 吴友宇,盛元锋. 甚高频信号源的设计[J]. 武汉工学院学报, 2009, 0(4): 533-535 |
| |
| 作者姓名： | 吴友宇 盛元锋 |
| |
| 作者单位： | 武汉理工大学信息工程学院,湖北武汉430070 |
| |
| 摘 要： | 为了给小型信标模拟器提供甚高频载波，利用锁相环（phase loop lock，PLL）频率合成原理，使用集成锁相频率合成器ADF4360-8设计甚高频（ultra high frequency，UHF）信号源，详述了电路的硬件设计，简要介绍了软件设计。实验结果表明，频率误差小于±0.002%，达到了预期的技术指标。
|
| 关 键 词： | UHF载波 锁相频率合成器 UHF信号源 |
Design of UHF Carrier |
| |
| WU Youyu,SHENG Yuanfeng. Design of UHF Carrier[J]. , 2009, 0(4): 533-535 |
| |
| Authors: | WU Youyu SHENG Yuanfeng |
| |
| Affiliation: | ( Prof. ; School of Information Engineering, WUT, Wuhan 430070, China) |
| |
| Abstract: | In order to provide UHF carrier for small navigation simulator, an integrated phase -locked frequency synthesizer ADF4360 - 8 was used to design UHF carrier signal source based on the theory of PLL. The hardware circuit was designed and the software was introduced. The experiment results show that the frequency error of margin is less than 0.002% ,which indicates that the design meets the technical specifications. |
| |
| Keywords: | UHF carrier integrated PLL synthesizer UHF Carrier signal source |
| 本文献已被 维普 等数据库收录！ |
|
