A silicon symmetrical transistor utilizing an epitaxially grown base region

A silicon symmetrical transistor having high symmetry of current gains, extremely low saturation resistance and high-frequency performance is fabricated by utilizing ap-type wafer with extremely low resistivity for the collector, ann-type epitaxial layer grown on the wafer for the base and ap-type region diffused into the layer for the emitter of the transistor. High injection efficiencies of the two junctions are obtained owing to the high surface concentration of the emitter and the high impurity concentration of the wafer. A thin base of about 2µ in thickness, large junction areas of about 0.70 mm in diameter and the junction area ratio of about 0.9966, are used for high survival factors. The collector junction is formed in the epitaxial layer intentionally away from the interface, in order to have a nearly equal impurity distribution to that near the emitter, and to keep away from the crystal imperfections near the interface. Combination of diffusion-epitaxial technique with the optimum geometry results in the structure capable of replacing a number of other devices designed for specific functions. Good symmetry of current gains is obtained: the hFE's above 20 in the two directions at 10 µa to above 50 ma of collector currents. The saturation resistance is in the neighborhood of 1 Ω. Current gain band-width fTis greater than 20 Mc.