(1) Center for Manufacturing, University of Kentucky, Lexington, KY 40506, USA;(2) Department of Electrical and Computer Engineering and Center for Manufacturing, University of Kentucky, Lexington, Kentucky 40506, USA
Abstract:
A condition system is a form of Petri net that interacts with other condition systems and the environment via state-based signals called conditions. The condition language framework has been used in previous papers to characterize the input/output behavior of such interacting systems, as well as to specify desired control behavior among other things. In this paper, we show that condition sequences (the specification) and condition systems (the model of the system) have an equivalent structure in the computation tree logic (CTL) framework. The primary goals of this work are to be able to utilize existing tools for program verification for our systems, and to make our work more accessible to the temporal logic community.