| A Method for Minimization Design of Two-Level Logic Networks Using Multiplexer Universal Logic Modules |
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| 引用本文： | Jiang Wenbin. A Method for Minimization Design of Two-Level Logic Networks Using Multiplexer Universal Logic Modules[J]. 计算机科学技术学报, 1994, 9(1): 92-96. DOI: 10.1007/BF02939490 |
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| 作者姓名： | Jiang Wenbin |
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| 作者单位： | Department of Physics，Huaibei Coal Teachers' College，Huaibei 235000 |
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| 摘 要： | A decomposition approach of the combinational functions is discussed.A design method,by which the minimization or near minimization of two-level combinational network can be obtained,is presented for a combinational function realized by using multiplexer universal logic modules.Using the method,the automated synthesis of the combinational functions can be accomplished on a computer.
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| 关 键 词： | CAD 二级逻辑网设计 多路转换器 极小化设计方法 |
A method for minimization design of two-level logic networks using multiplexer universal logic modules |
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| Wenbin Jiang. A method for minimization design of two-level logic networks using multiplexer universal logic modules[J]. Journal of Computer Science and Technology, 1994, 9(1): 92-96. DOI: 10.1007/BF02939490 |
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| Authors: | Wenbin Jiang |
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| Affiliation: | Department of Physics; Huaibei Coal Teachers' College; Huaibei 235000; |
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| Abstract: | A decomposition approach of the combinational functions is discussed. A design method, by which the minimization or near minimization of two-level combinational network can be obtained, is presented for a combinational function realized by using multiplexer universal logic modules. Using the method, the automated synthesis of the combinational functions can be accomplished on a computer. |
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| Keywords: | Function decomposition characterizing parameter multiplexer realization logic design minimization design |
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