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On the Impact of Performance Faults in Modern Microprocessors |
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| Authors: | Naghmeh Karimi Michail Maniatakos Chandrasekharan Tirumurti Yiorgos Makris |
| Affiliation: | 1. ECE Department, Polytechnic Institute of New York University, Brooklyn, NY, 11201, USA 2. ECE Department, New York University, Abu Dhabi, PO Box 129188, Abu Dhabi, UAE 3. SoC Enabling Group, Intel Corporation, Santa Clara, CA, 95050, USA 4. EE Department, The University of Texas at Dallas, Richardson, TX, 75080, USA |
| Abstract: | Modern microprocessors incorporate a variety of architectural features, such as branch prediction and speculative execution, which are not critical to the correctness of their operation yet are essential towards improving performance. Accordingly, while faults in the corresponding hardware may not necessarily affect functional correctness, they may, nevertheless, adversely impact performance. In this paper, we investigate quantitatively the performance impact of such faults using a superscalar, dynamically-scheduled, out-of-order, Alpha-like microprocessor, on which we execute SPEC2000 integer benchmarks. We provide extensive fault simulation-based experimental results that elucidate the various aspects of performance faults and we discuss how this information may guide the inclusion of additional hardware for performance loss recovery and yield enhancement. |
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