CMOS Ultrasound Transceiver Chip for High-Resolution Ultrasonic Imaging Systems |
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Authors: | Insoo Kim Hyunsoo Kim Griggio F Tutwiler RL Jackson TN Trolier-McKinstry S Kyusun Choi |
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Affiliation: | Dept. of Electr. Eng., Pennsylvania State Univ., University Park, PA, USA; |
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Abstract: | The proposed CMOS ultrasound transceiver chip will enable the development of portable high resolution, high-frequency ultrasonic imaging systems. The transceiver chip is designed for close-coupled MEMS transducer arrays which operate with a 3.3-V power supply. In addition, a transmit digital beamforming system architecture is supported in this work. A prototype chip containing 16 receive and transmit channels with preamplifiers, time-gain compensation amplifiers, a multiplexed analog-to-digital converter with 3 kB of on-chip SRAM, and 50-MHz resolution time delayed excitation pulse generators has been fabricated. By utilizing a shared A/D converter architecture, the number of A/D converter and SRAM is cut down to one, unlike typical digital beamforming systems which need 16 A/D converters for 16 receive channels. The chip was fabricated in a 0.35-mum standard CMOS process. The chip size is 10 mm2, and its average power consumption in receive mode is approximately 270 mW with a 3.3-V power supply. The transceiver chip specifications and designs are described, as well as measured results of each transceiver component and initial pulse-echo experimental results are presented. |
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