| 32位CRC校验码的并行算法及硬件实现 |
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| 引用本文： | 俞迅.32位CRC校验码的并行算法及硬件实现[J].信息技术,2007,31(4):71-74. |
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| 作者姓名： | 俞迅 |
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| 作者单位： | 同济大学电子与信息工程学院,上海,200092 |
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| 摘 要： | 通过对CRC校验码原理的分析,研究了一种并行32位CRC算法。该算法采用递推的方法,直接得出计算多位数据后的CRC余数与计算前余数之间的逻辑关系。相对于一般的按位串行计算或者查表并行计算的方法来说,该方法运算速度快且不需要额外的空间存储余数表,十分有利于硬件实现。
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| 关 键 词： | 模2运算 并行CRC算法 |
| 文章编号： | 1009-2552（2007）04-0071-04 |
| 修稿时间： | 2006-11-20 |
The 32 - bit cyclic redundancy check parallel algorithm and hardware implementation |
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| YU Xun.The 32 - bit cyclic redundancy check parallel algorithm and hardware implementation[J].Information Technology,2007,31(4):71-74. |
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| Authors: | YU Xun |
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| Affiliation: | College of Electronic and Information Engineering, Tongji University, Shanghai 200092, China |
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| Abstract: | Based on the theory of the cyclic redundancy check,a parallel algorithm is studied in the paper.This algorithm uses a recursive method to calculate the logic relationship of the checksum.Differing from general serial algorithm or the parallel algorithm based on list-checking,it is faster and doesn't need the extra memory space to store the remainder list.It is very easy to be implemented by hardware. |
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| Keywords: | CRC |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
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