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Behavioral Level Noise Modeling and Jitter Simulation of Phase-Locked Loops with Faults Using VHDL-AMS
Authors:Nihal J. Godambe  C.-J. Richard Shi
Affiliation:(1) Wireless Integrated Technology Center, Motorola, Ft. Lauderdale, FL, 33322;(2) Department of Electrical Engineering, University of Washington, Seattle, WA, 98195
Abstract:
Keywords:analog test  fault modeling  fault simulation  noise  jitter  behavioral fault modeling
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