一种集成轨到轨比较器电路设计

传统比较器在其输入电压过高或过低时,输入MOS对管将进入截止区,从而使电路无法正常工作。本设计采用轨到轨放大器技术,使比较器在输入电压满摆幅时都能正常工作,增加了输入电压的范围。本文基于0.18μm COMS工艺完成电路的设计,并使用Spectre进行电路仿真。结果表明,在电源电压为1.8V时,电路静态功耗为360μW,电压比较精度为80μV,时延为13.2ns。

Design of integrated rail-to-rail comparator circuit

When the input voltage of the traditional comparator is too high or too low,the input MOS pair will enter the cut-off area,thus making the circuit unable to work normally.This design adopts rail-to-rail amplifier technology,so that the comparator can work normally when the input voltage is full swing,and the range of input voltage is increased.Based on 0.18μm COMS process,completing the circuit design,using Spectre to fulfill the circuit simulation.And the results show that when the power supply voltage is 1.8V,the static power consumption of the circuit is 360μW,the voltage comparison precision is 80μV,and the delay is 13.2ns.