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交替互补定位器及其用于双模比较冗余结构的差错定位
引用本文:江建慧. 交替互补定位器及其用于双模比较冗余结构的差错定位[J]. 计算机研究与发展, 2001, 38(6): 754-764
作者姓名:江建慧
作者单位:同济大学计算机科学与工程系 ;中国科学院计算技术研究所;复旦大学计算机科学与工程系
基金项目:国家自然科学基金! (6973 3 0 10、69873 0 10 ),上海高等学校青年教师学术基金,中国科学院计算技术研究所CAD开放实验室开放基金资
摘    要:双模比较冗余结构是一种广泛应用的低成本容错结构。当两个冗余模块之一发生故障时,比较器将给出差错检测指示输出,该输出既可以按中断信号形式通知系统作出相应的差错处理,也可以按硬件信号形式直接用于终止系统工作或启动重构,目的是防止故障冗余结构给出错误输出,或者确保系统能够提供连续的服务。这种冗余结构的缺点是比较器不能确切指明故障模块,并因此而需要较大的时间开销来完成系统重构和恢复操作。为解决这一问题,提出了一种具有并发输出差错定位功能的双重比较冗余结构。其中单个冗余模块的输出是一个交替矢量,两个冗余模块的输出形成了一个交替互补矢量,该矢量送入一个交替互补定位器。在正常输入情况下,根据定位器的输出就可以确定冗余系统是无差错的、还是冗余模块或定位顺本身存在故障。交替互补定位器由D型触发器和通用门电路构成,它被证明为是一个完全故障定位的定位器。由于所提出的双模比较冗余结构是基于时间冗余原理工作的,因此它适用于对速度要求并不是非常苛刻的容错系统。

关 键 词:并发差错定位 交替互补定位器 双模比较冗余结构 容错 计算机

ALTERNATING-COMPLEMENTARY LOCATOR AND ITS USE FOR ERROR LOCATION IN DUAL-MODULAR REDUNDANCY WITH COMPARISON STRUCTURE
JIANG Jian-Hui. ALTERNATING-COMPLEMENTARY LOCATOR AND ITS USE FOR ERROR LOCATION IN DUAL-MODULAR REDUNDANCY WITH COMPARISON STRUCTURE[J]. Journal of Computer Research and Development, 2001, 38(6): 754-764
Authors:JIANG Jian-Hui
Abstract:The dual-modular redundancy with comparison (DMRC) structure is a kind of widely used low-cost fault-tolerant structures. When a fault occurs in one of two redundant modules, the comparator gives an error-detecting indication signal. This indication output can be used as an interrupt signal to start an error handling procedure, or as a hardware signal to stop the operation or to start reconfiguration and recovery of the DMRC structure. However, the drawback of such a structure is that the comparator can not indicate the faulty redundant module. This will result in a great time overhead to error location and system reconfiguration. To diminish the time overhead of error location, a DMRC structure with concurrent error location capability is presented. Each output of a redundant module is an alternating variable. The two outputs produced by two redundant modules at the same time constitute an alternating-complementary variable. It is checked by an alternating-complementary locator. During normal operation, it can be determined whether a DMRC structure is error-free, or a redundant module or the locator itself is faulty or not according to the output given by the locator. The alternating-complementary locator is constructed by D-flip-flops and gate circuits. It is proved that it is totally fault locating. The concurrent error location capability of the proposed DMRC structure is built by the time redundancy principle, so it is suitable to be used in the non-speed-critical fault tolerant systems.
Keywords:dual-modular redundancy with comparison   concurrent error location   total fault location   locator   alternating-complementary logic
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