Fabrication of a guide block for measuring a device with fine pitch area-arrayed solder bumps |
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Authors: | Woo-Chang Choi Jee-Youl Ryu |
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Affiliation: | (1) Department of Information and Communications Engineering, Pukyong National University, Busan, 608-737, Korea;(2) MEMS/NANO Fabrication Center, Busan Techno-Park, Busan, 609-735, Korea; |
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Abstract: | This paper describes the design and fabrication of a guide block and micro probes, which were used for a vertical probe card
to test a chip with area-arrayed solder bumps. The size of the fabricated guide block was 10 mm × 6 mm. The guide block consisted
of 172 holes to insert micro probes, 2 guide holes for exact alignment, and 4 holes for bolting between the guide block and
the housing of a PCB. Pitch and size of the inserting holes were 80 μm, and 90 μm × 30 μm, respectively. A silicon on insulator
wafer was used as the substrate of the guide block to reduce micro probes insertion error. The micro probes were made of nickel–cobalt
(Ni–Co) alloy using an electroplating method. The length and thickness of the micro probes were 910 and 20 μm, respectively.
A vertical probe card assembled with the fabricated guide block and micro probes showed good x–y alignment and planarity errors within ±4 and ±3 μm, respectively. In addition, average leakage current and contact resistance
were approximately 0.35 nA and 0.378 ohm, respectively. The proposed guide block and micro probes can be applied to a vertical
probe card to test a chip with area-arrayed solder bumps. |
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