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RapidIO链的设计方案和应用
引用本文:黄先春,黄登山,骆艳卜. RapidIO链的设计方案和应用[J]. 计算机工程与应用, 2009, 45(32): 63-64. DOI: 10.3778/j.issn.1002-8331.2009.32.020
作者姓名:黄先春  黄登山  骆艳卜
作者单位:西北工业大学,电子信息学院,西安,710072;空军工程大学,电讯工程学院,西安,710077
基金项目:西北工业大学第-批基础研究基金 
摘    要:串行RapidIO支持两种工作方式:Message和DirectIO方式。DirectIO方式使用简单,但是它在连续传输多包的情况下,CPU需要等待LSU寄存器空闲。为了解决该问题,提出了RapidIO链的传输新方案,即用EDMA通道代替CPU配置SRIO的LSU寄存器。实验表明该方案能有效地降低CPU负荷。

关 键 词:高速串行IO口(SRIO)  增强型内存直接存取(EDMA)  CPU负荷
收稿时间:2008-09-11
修稿时间:2008-12-8 

Design and application of RapidIO chain
HUANG Xian-chun,HUANG Deng-shan,LU Yan-bo. Design and application of RapidIO chain[J]. Computer Engineering and Applications, 2009, 45(32): 63-64. DOI: 10.3778/j.issn.1002-8331.2009.32.020
Authors:HUANG Xian-chun  HUANG Deng-shan  LU Yan-bo
Affiliation:1.School of Electronics and Information,Northwestern Polytechnical University,Xi’an 710072,China 2.The Telecommunication Engineering Institute,Air Force Engineering University,Xi’an 710077,China
Abstract:SRIO(Serial RapidIO) supports two work modes:Message and DirectIO.The DirectIO mode is simple to operate,but in multi-packets transmission case,DSP CPU must wait until LSU(Load and Save unit) register is free.To solve this problem,the paper presents a new transimission way named RapidIO chain,which uses EDMA(Enhanced Direct Memory Access) channel instead of CPU to configure LSU registers of SRIO.Resuhs of experiment show that RapidlO chain can reduce CPU load effectively.
Keywords:Serial RapidIO(SRIO)  Enhanced Direct Memory Access(EDMA)  CPU load
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