非系统RS(31,19)编译码算法研究与FPGA实现

针对战术数据链系统低时延数据传输需求,提出一种适用于数据链系统的信道编码方案—非系统缩短码RS(31,19)。本文从MS多项式的观点讨论了非系统RS码的编码和译码算法,并对缩短RS码的编译码算法进行了研究。最后在FPGAEP3SE110上采用了一种改进的BM算法,成功实现RS(31,19)编译码复杂算法,有效提高了译码速度,简化了数据链系统硬件设计。

Encoding and Decoding Algorithm for Nonsystematic RS Codes and FPGA Implementation

Aiming at the demand of low latency transmission in tactical data link, one channel coding scheme which called nonsystematic shortened length RS (31, 19) codes is presented in this paper. The encoding and decoding algorithm of nonsystematic RS codes and shortened RS codes are discussed based on MS polynomial. Finally, a developed BM algorithm is used to improve the velocity of decoding and simplify the hardware design of data link, complex encoding and decoding algorithm of RS (31, 19) is implemented in the Altera''s FPGA EP3SE110 successfully.