Fuzzy logic-based embedded system for video de-interlacing |
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| Affiliation: | 1. Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Américo Vespucio s/n, 41092 Seville, Spain;2. Departamento de Electrónica y Electromagnetismo, Universidad de Sevilla, Av. Reina Mercedes s/n, 41012 Seville, Spain;1. Department of Cardiovascular Medicine, Cleveland Clinic, Cleveland, OH, USA;2. Cardiovascular Division, Brigham and Women''s Hospital, Harvard Medical School, Executive Director Cardiometabolic Trials, Harvard Clinical Research Institute, Boston, MA, USA;1. School of Economics & Management, Xidian University, Xi’an 710071, PR China;2. Economics and Management College, Civil Aviation University of China, Tianjin 300300, PR China;3. Research Center for Environment and Sustainable Development of the China Civil Aviation, Civil Aviation University of China, Tianjin 300300, PR China;4. University of Sydney Business School, Rm 503The University of Sydney, Sydney, Australia;5. School of Business, Western Sydney University, Penrith, NSW 2751, Australia |
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| Abstract: | Video de-interlacing algorithms perform a crucial task in video processing. Despite these algorithms are developed using software implementations, their implementations in hardware are required to achieve real-time operation. This paper describes the development of an embedded system for video de-interlacing. The algorithm for video de-interlacing uses three fuzzy logic-based systems to tackle three relevant features in video sequences: motion, edges, and picture repetition. The proposed strategy implements the algorithm as a hardware IP core on a FPGA-based embedded system. The paper details the proposed architecture and the design methodology to develop it. The resulting embedded system is verified on a FPGA development board and it is able to de-interlace in real-time. |
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