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Numerical simulation of the response of substrate traps to a voltage applied to the gate of a gallium arsenide field effect transistor
Affiliation:1. Laboratoire des Matériaux Semiconducteurs et Métalliques (LMSM), Université de Biskra, BP 145, 07000 Biskra, Algeria;2. School of Physics and Astronomy, Nottingham Nanotechnology and Nanoscience Center, University of Nottingham, Nottingham, NG7 2RD, UK;1. Graduate School & Faculty of Engineering, Chiba University, 1-33, Yayoi-cho, Inage-ku, Chiba-shi, Chiba 263-8522, Japan;2. College of Mechanical Engineering, Tianjin University of Science and Technology, No. 1038, Dagu Nanlu, Hexi District, Tianjin 300222, PR China;3. Chiba Industrial Technology Research Institute, 6-13-1, Tendai, Inage-ku, Chiba-shi, Chiba 263-0016, Japan;4. School of Civil Engineering, Southeast University, No. 2, Sipailou, Nanjing 210096, China;5. College of Materials Science & Engineering, Chongqing University, No. 174, Shazhengjie, Shapingba, Chongqing 400044, China;1. Sree Narayana College, Kannur, Kerala, India;2. Pazhassi Raja N.S.S. College, Mattannur, Kerala, India;1. Department of Physics, Christian College, Angadikal P.O., Chengannur, Kerala 689122, India;2. UGC–DAE Consortium for Scientific Research, University Campus, Khandwa Road, Indore 452017, India;1. Department of Physics, Mimar Sinan Fine Arts University, Sisli, Istanbul 34347, Turkey;2. Department of Energy Systems Engineering, Faculty of Engineering and Natural Sciences, Kadir Has University, Fatih, Istanbul 34083, Turkey;1. Physics Department, Faculty of Science, Assiut University, Assiut 71516, Egypt;2. Materials Science Laboratory, Physics Department, Girls College for Arts, Science, and Education, Ain Shams University, Cairo, Egypt
Abstract:We report on a numerical simulation of the response of substrate traps to a voltage applied to the gate of a gallium arsenide field effect transistor (GaAs FET) using proprietary simulation software. The substrate is assumed to contain shallow acceptors compensated by deep levels. The ratio between the densities of deep and shallow levels is considered to be one hundred, which is a typical value for semi-insulating substrates. Although several traps may be present in the substrate but only the most commonly observed ones are considered, namely hole traps related to Cu and Cr, and the familiar native electron trap EL2. The current–voltage characteristics of the GaAs FET are calculated in the absence as well as in the presence of the above mentioned traps. It was found that the hole traps are affected by the gate voltage while the electron trap is not. This effect on the response of hole traps is explained by the fact that the quasi-hole Fermi level in the substrate is dependent on the gate voltage. However, the electron quasi-Fermi level in the substrate is insensitive to the gate voltage and therefore electron traps are not perturbed.
Keywords:Substrate traps  Gate voltage  GaAs MESFET  SILVACO simulation
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