Exact reliability analysis of combinational logic circuits |
| |
Authors: | Dokouzgiannis SP Kontoleon JM |
| |
Affiliation: | Dept. of Electr. Eng., Thessaloniki Univ.; |
| |
Abstract: | A novel method is presented for the exact reliability analysis of combinational logic circuits. A model is developed that allows the logic circuit to be presented by a circuit equivalent graph (CEG). The reliability is analyzed by a systematic searching of certain subgraphs from the CEG. A computer algorithm and an example are given. The method gives the exact solution to the combinational logic circuit reliability-analysis problem. This is achieved by proper gate/circuit modeling, which allows the enumeration of all redundant fault vectors in a given circuit. Due to the concept of dominance among fault vectors, the number of necessary enumerations is appreciably reduced, and thus circuits with a few tens of gates can be efficiently analyzed |
| |
Keywords: | |
|
|