A Highly Integrated CMOS Analog Baseband Transceiver With 180 MSPS 13-bit Pipelined CMOS ADC and Dual 12-bit DACs

A CMOS analog baseband transceiver with a 13-bit, 180 MSPS pipelined ADC and dual 12-bit, 180 MSPS current-steering DACs is presented. The ADC is implemented without a dedicated track-and-hold stage, utilizes a front-end 2.5-bit stage with matched MDAC/comparator tracking circuits, and demonstrates an ENOB of 10.6 bits at 15 MHz and 9.7 bits at 100 MHz, employing a low-jitter delay-lock loop for its phasing. The dual I/Q DACs show over 62 dB SFDR over the Nyquist band by utilizing a dynamic linearity enhancing architecture.