Design and implementation of sub 0.5‐V OTAs in 0.18‐μm CMOS

A family of bulk‐driven CMOS operational transconductance amplifiers (OTAs) has been designed for extremely low supply voltages (0.3‐0.5 V). Three OTA design schemes with different gain boosting techniques and class AB input/output stages are discussed. A detailed comparison among these schemes has been presented in terms of performance characteristics such as voltage gain, gain‐bandwidth product, slew rate, circuit sensitivity to process/mismatch variations, and silicon area. The design procedures for all the compared structures have been developed. The OTAs have been fabricated in a standard 0.18‐μm n‐well CMOS process from TSMC. Chip test results are in good agreement with theoretical predictions and simulations.