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FPGA‐based implementation for improved control scheme of grid‐connected PV system with 3‐phase 3‐level NPC‐VSI
Authors:Satabdy Jena  Gayadhar Panda  Rangababu Peesapati
Affiliation:1. Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi, Delhi, India;2. Department of Electrical Engineering, National Institute of Technology Meghalaya, Shillong, India;3. Department of Electronics and Communication Engineering, National Institute of Technology Meghalaya, Shillong, India
Abstract:The large scale penetration of renewable energy resources has boosted the need of using improved control technique and modular power electronic converter structures for efficient and reliable operation of grid‐connected systems. This study investigates the performance of a grid‐connected 3‐phase 3‐level neutral‐point clamped voltage source inverter for renewable energy integration by using improved current control technique. For medium or high‐voltage grid interfacing, the multilevel inverter structure is generally used to reduce the voltage stress across the switching device as well as the harmonic distortion. The neutral‐point clamped voltage source inverter is controlled by using decoupling technique along with the proper grid synchronization via moving average filter–based phase‐locked loop. The moving average filter–based phase‐locked loop is used to reduce the delay in grid angle estimation under balanced as well as distorted grid conditions. A Lyapunov‐based approach for analysing the stability of the system has also been discussed. In this study, the hardware‐in‐loop (HIL) simulation of the control algorithm and the grid synchronization technique is realized using Virtex‐6 FPGA ML605 evaluation kit. The performance of the system is analyzed by conducting a time‐domain simulation in the Matlab/Simulink platform and its performance is examined in the HIL environment. The simulation and the hardware cosimulation results are presented to validate the effectiveness of the proposed control scheme.
Keywords:field programmable gate array (FPGA)  moving average filter (MAF)  photovoltaic (PV)  phase‐locked loop (PLL)  two‐degree‐of‐freedom (2DoF)
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