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板级设计中硬件连接部分的验证方法探讨
作者单位:安徽大学电子科学与技术学院
摘    要:基于板极设计高速化,复杂化的发展趋势,缩短设计进入市场时间的方法无疑成为各个设计公司的焦点。现有的EDA工具可以帮助工程师在确定系统框架并完成原理图输入工作后进行电气规范规则等的检查来减少设计错误,但是EDA工具在硬件连接错误检查方面的功能有所欠缺。本文讨论了一种基于实用报表提取语言的数据库处理工具进行硬件连接检查的新方法的可行性以及优越性。

关 键 词:板级设计  EDA工具  硬件连接检查  Perl语言

Discussion of Hardware Connectivity validation method in Board Level Design
JIANG Yuan-jun,WU Xiu-long. Discussion of Hardware Connectivity validation method in Board Level Design[J]. Digital Community & Smart Home, 2008, 0(33)
Authors:JIANG Yuan-jun  WU Xiu-long
Abstract:Based on the developing trend of board design's high-speed and complication, it is no surprise that how to shorten the timeto-market of products is an import metric for every design company.After fixing on the architecture of system and finishing the design entry, engineers can use EDA tools to do ERC check in order to reduce design errors.But EDA tools are short of the function in hardware connectivity check.In this article, we will discuss the feasibility and superiority of using a new method to go on with the hardware connectivity check, which is based on Perl(Practical Extraction and Report Language).
Keywords:board level design  EDA tool  hardware connectivity validation  Perl
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