24 Gbit/s regenerating demultiplexer IC in silicon bipolar technology |
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| Authors: | Hauenschild J. Rein H.M. McFarland W. Pettengill D. |
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| Affiliation: | Ruhr-Univ., Bochum, AG Halbleiterbauelemente, Germany; |
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| Abstract: | A 1:2 regenerating demultiplexer IC has been realised in an advanced self-aligned silicon bipolar technology using 0.8 mu m lithography. The circuit can be operated up to 24 Gbit/s at 5 V supply voltage. This is by far the highest data rate reported for a demultiplexer in any IC technology.<> |
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