| 小波图像编码的VLSI实现 |
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| 引用本文： | 乔世杰,王国裕. 小波图像编码的VLSI实现[J]. 半导体学报, 2002, 23(7) |
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| 作者姓名： | 乔世杰 王国裕 |
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| 作者单位： | 西安交通大学电子工程系,西安,710049 |
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| 摘 要： | 设计了一种模块化的二维离散小波变换(2-D DWT)的VLSI结构.该结构可以实时完成小波变换,且很容易扩展.针对零树编码硬件实现方面的不足,利用一种简单的顺序扫描方式和两个标志阵列,设计了一种适合硬件实现的快速零树编码算法(FZIC)和FZIC硬件实现的VLSI结构,编写了2-D DWT和FZIC硬件结构的Veri log HDL模型,并进行了仿真和逻辑综合.结合2-D DWT和FZIC,实现了小波图像编码系统 ,并用ALTERA CPLD成功进行了验证.
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| 关 键 词： | 离散小波变换 零树编码 VLSI Verilog HDL CPLD |
VLSI Implementation of a Wavelet Image Coder |
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| Qiao Shijie,WANG Guoyu. VLSI Implementation of a Wavelet Image Coder[J]. Chinese Journal of Semiconductors, 2002, 23(7) |
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| Authors: | Qiao Shijie WANG Guoyu |
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| Abstract: | A modular architecture for two dimension (2-D) discrete w avelet transform (DWT) is designed.The image data can be wavelet transformed in real time,and the structure can be easily scaled up to higher levels of DWT.A f ast zerotree image coding (FZIC) algorithm is proposed by using a simple sequent ial scan order and two flag maps.The VLSI structure for FZIC is then presented.B y combining 2-D DWT and FZIC,a wavelet image coder is finally designed.The code r is programmed,simulated,synthesized,and successfully verified by ALTERA CPLD. |
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| Keywords: | discrete wavelet transform zerotree image codi ng VLSI Verilog HDL CPLD |
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