高速SERDES的多板传输技术与SI仿真

随着SERDES传输速率达到10Gbps，高速PCB上的信号传输尤其是多板间传输，已经成为高速设计的实现难点。高速PCB及其要素的设计、分析、仿真，以及高速传输链路的设计优化，是多板SERDES传输实现更高速率的关键。本文对高速串行SERDES的原理和架构进行了深入分析，研究了多板传输中影响信号完整性（SI）的关键因素和建模优化方法；最后，针对实验电路板建立了多板仿真模型，对实际的SERDES差分网络进行了仿真分析。

The Multi-Board Transmission Technology and the SI Simulation for High-Speed SERDES Design

With the SERDES data rate approaching 10 Gbps,the transmission technology of PCB,especially the multi-board transmission,has become more and more difficult.Understanding,designing and simulating the PCB and its features as precisely as possible is essential for optimizing the complete signal path,and the very high-speed serial links can be achieved.This paper firstly analyzes the framework of SERDES,and then studies and models the key features of the high-speed PCB design.As a result,the multi-board transmission model is built by using the experimental PCBs,and the key SERDES network transmission on multi-PCBs are simulated and analyzed.