| 高速PCB板设计研究 |
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| 引用本文： | 周芸,柯敏毅. 高速PCB板设计研究[J]. 通信电源技术, 2008, 25(2): 23-26 |
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| 作者姓名： | 周芸 柯敏毅 |
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| 作者单位： | 湖北工业大学,湖北,武汉,430068 |
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| 摘 要： | 在高速PCB板设计中，既需要兼顾信号完整性，保证信号质量，又需要针对EMI干扰，按照减小电磁干扰的要求进行设计，甚至还需要考虑静电放电的保护等要求。文中针对以上高速PCB设计要求，按照PCB的设计流程，研究了PCB的叠成选择，元器件的分组和布局，PCB的布线理论等方面的高速PCB板的设计技术。
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| 关 键 词： | PCB叠层 元器件布局 PCB布线 |
| 文章编号： | 1009-3664(2008)02-0023-04 |
| 修稿时间： | 2007-10-10 |
Research on High Speed PCB Design |
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| ZHOU Yun,KE Min-yi. Research on High Speed PCB Design[J]. Telecom Power Technologies, 2008, 25(2): 23-26 |
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| Authors: | ZHOU Yun KE Min-yi |
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| Affiliation: | (Hubei University of Technology , Wuhan 430068, China) |
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| Abstract: | During the high speed PCB design, not only signal integrity needs to be concerned to insure the signal quality, but also the anti - EMI rules need to be followed to reduce the EMI, even the ESD problem is within the design consideration. Following the step of PCB design, this paper focuses on the above high speed PCB design requirements and research on the theories about PCB stackup, components＂ partition and placement and PCB layout. |
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| Keywords: | PCB stackup components＂ placement PCB layout |
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