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Fully integrated SONOS flash memory cell array with BT (body tied)-FinFET structure
Authors:Suk-Kang Sung Tae-Yong Kim Eun Suk Cho Hye Jin Cho Byung Yong Choi Chang Woo Oh Byung-Kyu Cho Choong-Ho Lee Donggun Park
Affiliation:Device Res. Team, Samsung Electron. Co., Gyeonggi-Do, South Korea;
Abstract:Fully integrated SONOS memory cell arrays with BT (body tied)-FinFET structure have been fabricated successfully by using manufacturable NOR flash technology. The uniformity of threshold voltage (V/sub th/) distribution of the fabricated FinFET SONOS cells is fairly better than that of conventional flash cells thanks to both the widening effective channel width of FinFET structure and negligible coupling interference of SONOS device. New two-step channel implantation process has been introduced for the compensation for the boron out-diffusion of a three-dimensional silicon fin structure. The measured FinFET SONOS cells with a two-step channel doping profile show the improved program and erase characteristics. For the improvement of program/erase and retention characteristics all together, we have investigated the modulation of erase bias condition with respect to back tunneling effect.
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