Winner-Takes-All Associative Memory: A Hamming Distance Vector Quantizer |
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Authors: | Philippe O. Pouliquen Andreas G. Andreou Kim Strohbehn |
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Affiliation: | (1) Electrical and Computer Engineering, Center for Language and Speech Processing, Johns Hopkins University, 3400 N. Charles Street, Baltimore, MD, 21218;(2) Applied Physics Laboratory, Johns Hopkins University, Laurel, MD 20723, USA |
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Abstract: | We present a design methodology for mapping neuralyinspired algorithms for vector quantization, into VLSI hardware.We describe the building blocks used: memory cells, current conveyors,and translinear circuits. We use the basic building blocks todesign an associative processor for bit-pattern classification;a high-density memory based neuromorphic processor. Operatingin parallel, the single chip system determines the closest match,based on the Hamming distance, between an input bit pattern andmultiple stored bit templates; ties are broken arbitrarily. Energyefficient processing is achieved through a precision-on-demandarchitecture. Scalable storage and processing is achieved througha compact six transistor static RAM cell/ALU circuit. The singlechip system is programmable for template sets of up to 124 bitsper template and can store up to 116 templates (total storagecapacity of 14 Kbits). An additional 604 bits of auxiliary storageis used for pipelining and fault tolerance re-configuration capability.A fully functional 6.8 mm by 6.9 mmchip has been fabricated in a standard single–poly, double–metal2.0µmn–well CMOS process. |
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Keywords: | Analog VLSI vector quantization associative memory computational memory smart memory associative processor Winner-Takes-All precision-on-demand current-mode subthreshold circuits |
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