Radix-8 full adder in QCA with single clock-zone carry propagation delay |
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| Affiliation: | 1. CE Department, Sadjad University, Mashhad, Iran;2. CSE Department, Shahid Beheshti University, Tehran 19839-63113, Iran;3. CS School, Institute for Research in Fundamental Sciences (IPM), Tehran, Iran;1. Computer Engineering Department, Iran University of Science and Technology, Tehran, Iran;2. Computer Engineering Department, Bilkent University, Ankara, Turkey;1. School of Electronic Engineering, Griffith University, 170 Kessels Road, Nathan, Brisbane, QLD 4111, Australia;2. School of Applied Psychology, Griffith University, Mt Gravatt Campus, Kessels Road, Brisbane, QLD 4111, Australia;1. Department of Computer Science and Information Engineering, National Taitung University, Taiwan;2. School of Computing Informatics and Decision Systems Engineering, Arizona State University, USA;3. Department of Computer Science and Information Engineering, National Chung Cheng University, Taiwan;1. Eindhoven University of Technology, Postbus 513, 5600MB Eindhoven, The Netherlands;2. Intel Benelux B.V., Capronilaan 37, 1119NG Schiphol-Rijk, The Netherlands;1. OFFIS – Institute for Information Technology, Oldenburg, Germany;2. University of Cantabria, Santander, Spain;3. Politecnico di Milano, Italy;4. STMicroelectronics, Italy;5. Vodafone Automotive Telematics, Switzerland;6. Eurotech, Italy;7. Politecnico di Torino, Italy;8. Intecs, Italy;9. GMV, Spain;10. KTH Royal Institute of Technology, Stockholm, Sweden;11. EDALab s.r.l., Italy |
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| Abstract: | We design a 3-bit adder or a radix-8 full adder (FA) in quantum-dot cellular automata (QCA), where the 3-bit carry propagation path can be accommodated in one clock-zone. To achieve this, we introduce group majority signals similar to group propagate and generate signals in parallel prefix computations, use them to reformulate the carry expressions of a previous radix-4 FA, and as such we could extend it to higher radix FAs. Applying the aforementioned new interpretation of carry expressions (via group majority signals) on 3-bit adders, results in that only a single clock cycle is required for 12-bit (vs. the previous 8-bit) carry propagation, across four radix-8 FAs. Based on the proposed radix-8 QCA-FA, we realized 8-, 16-, 32-, 64, and 128-bit QCA adders via QCADesigner. Comparison of these adders with the previous radix-4 experiment, showed 9–41% speed up, and 57–76% area saving, for 16–128-bit adders, respectively. On the other hand, compared to the best previous radix-2 design, for the same bit widths, we experienced 57–172% speed up, but at the cost of 138–4% area increase, except for the 64 and 128-bit cases, where we also experienced 19% and 41% area saving, respectively. |
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