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基于双核架构的全电子引信测试仪设计
引用本文:周孟哲,周伟.基于双核架构的全电子引信测试仪设计[J].太赫兹科学与电子信息学报,2023,21(2):176-182.
作者姓名:周孟哲  周伟
作者单位:中国工程物理研究院 电子工程研究所,四川 绵阳 621999
摘    要:传统的全电子引信无源导通电阻测试均采用外接电阻测试设备或通用的导通电阻测试电路设计,与全电子引信通电工作的电气性能测试毫无关联,无法避免故障产品加电后烧毁的风险。为此提出了能对无源导通电阻和全电子引信通电工作电气性能综合诊断的系统性设计思路,设计了一种基于ARM芯片和FPGA双核架构的全自动测试控制架构和24 bit高精确度四线制无源导通电阻测试电路,对全电子引信的对外接口部分的无源导通电阻及引信加电工作特性进行全面测试。测试结果表明,该设计能够进行无源导通电阻高精确度测试及通电后工作性能的综合测试,电阻测量精确度为±0.1%。

关 键 词:双核  全电子引信测试  无源导通电阻  四线制
收稿时间:2020/10/8 0:00:00
修稿时间:2021/1/6 0:00:00

Design of full electronic fuze tester based on dual core architecture
ZHOU Mengzhe,ZHOU Wei.Design of full electronic fuze tester based on dual core architecture[J].Journal of Terahertz Science and Electronic Information Technology,2023,21(2):176-182.
Authors:ZHOU Mengzhe  ZHOU Wei
Abstract:The traditional passive-resistance test of all electronic fuze adopts external on resistance test equipment or general on resistance test circuit design, which has nothing to do with the electrical performance test of full electronic fuze, and can not avoid the risk of the failure product burning after power on. Therefore, a systematic design idea is proposed to diagnose the electrical performance of passive-resistance and full electronic fuze. This paper designs a full-automatic test control architecture based on ARM chip and FPGA dual core architecture and a 24 bit high-precision four-wire passive-resistance test circuit. The passive-resistance of the external interface part of the all electronic fuze and the working characteristics of the fuze are comprehensively tested. The test results show that the design can be utilized to test the passive-resistance with high precision(the measuremetn accuracy is ±0.1%) as well as the comprehensive working performance after power on.
Keywords:dual core  full electronic fuze test  passive-resistance  four-wire system
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