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基于FPGA和NIOS的惯导组件测试系统研究
引用本文:张志文,彭彦.基于FPGA和NIOS的惯导组件测试系统研究[J].微处理机,2014(1):85-89.
作者姓名:张志文  彭彦
作者单位:西安工业大学电子信息工程学院,西安710032
摘    要:针对惯导组件产品测试中多种信号输出的测量需求,设计了一种基于FPGA和NIOSII软核的双模式惯导组件数据采集系统。该系统以FPGA和USBCY7C68013芯片为核心,实现对4个惯导组件输出的48路脉冲进行频率计数和对8个惯导组件输出8路串口数据的接收,最后通过USB芯片将采集得到的数据上传至测控计算机,并由计算机进行保存、处理和显示。该设计降低了采集电路复杂度,提高了产品测试效率和采集系统的可靠性、稳定性。

关 键 词:惯导组件  现场可编程门阵列  NIOS  II软核  USB芯片  数据采集

Research on Testing System for Inertial Navigation Components Based on FPGA and NIOS
ZHANG Zhi - wen,PENG Yan.Research on Testing System for Inertial Navigation Components Based on FPGA and NIOS[J].Microprocessors,2014(1):85-89.
Authors:ZHANG Zhi - wen  PENG Yan
Affiliation:( School of Electronics Information Engineering, Xi' an Technological University, Xi' an 710032, China )
Abstract:For the requirement of measuring the output of' multiple signals in the test of inertial navigation components, a dual - mode data acquisition system of inertial component is designed on the basis of FPGA and NIOS lI soft -core. The system takes FPGA and USB CY7C68013 as its core to count the 48 ports pluses outputted by 4 inertial navigation components and receive serial port data of 8 ports outputted by 8 inertial navigation components. In the end, the collected data will be uploaded to a controlling computer through a USB chip, and saved, processed, displayed by the computer. This design reduces complexity of the acquisition circuit, raises measurement efficiency and promotes the reliability and stability of the acquisition system.
Keywords:Inertial navigation component  FPGA  NIOS II soft - core  USB chip  Data collection
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